Digital Signal Processing (DSP) Engineer

Location: Neuchâtel, Switzerland

Our Team:

Semtech Corporation is a leading supplier of analog and mixed-signal semiconductors serving high-end consumer, enterprise computing, communications, and industrial markets. As our future market opportunities continue to expand, we are investing heavily in disruptive analog platforms and breakthrough system-level innovation.

Our Wireless Analog/Digital and LoRa® System teams in Neuchâtel and Grenoble bring world-class expertise in Low Power Wide Area Network (LPWAN) solutions. We are global pioneers in long-range, ultra-low-power, battery-operated wireless communication — spanning antenna design, IC analog and digital architecture, low-power systems, protocol development, and cloud-connected solutions.

You will be part of the journey shaping the next-generation LoRa® and LoRaWAN® system architecture — driving innovation that enables billions of connected devices worldwide.

Job Summary:

We are seeking a highly skilled Staff Digital Design Engineer with deep expertise in Digital Signal Processing (DSP) for wireless communication systems.

In this staff-level role, you will contribute to the end-to-end development of advanced communication algorithms and their efficient RTL implementation targeting FPGA and ASIC platforms. You will play a critical role in defining system architecture, making key performance trade-offs, and translating complex DSP concepts into robust, silicon-ready digital designs.

This is an opportunity to influence next-generation wireless platforms at both algorithm and implementation level — combining theory, architecture, and hands-on hardware validation.

Responsibilities:

Algorithm Development & System Architecture (50%)

• Design and develop advanced DSP algorithms for wireless communication systems, including modulation/demodulation, channel coding/decoding, synchronization, equalization, MIMO, and beamforming (20%)
• Architect system-level solutions and drive critical trade-off decisions across performance, power, silicon area, and time-to-market (10%)
• Implement and validate algorithm prototypes in MATLAB, Python, or C/C++ for simulation and proof-of-concept demonstrations (10%)
• Conduct in-depth performance analysis, modeling, and optimization studies to ensure robust and scalable designs (10%)

RTL Design & Digital Implementation (20%)

• Participate in RTL design and implementation using Verilog, VHDL, or SystemVerilog for FPGA and ASIC targets (10%)
• Translate complex DSP algorithms into efficient and scalable digital architectures optimized for timing, power, and area constraints (10%)

Integration, Validation & Technical Leadership (30%)

• Support lab bring-up, testing, and characterization of designs on hardware platforms (10%)
• Collaborate closely with RF engineers, firmware developers, and system architects to integrate DSP blocks into the overall system architecture (10%)
• Document algorithms, specifications, and implementation details to enable knowledge sharing and design continuity (10%)

Minimum Qualifications:

• Master’s or PhD degree in Electrical Engineering, Computer Engineering, or related field
• 3+ years of experience in DSP algorithm development and RTL design for wireless communication systems
• Expert level understanding of communication theory and signal processing algorithms (timing recovery, channel estimation, AGC, equalization, OFDM, MIMO, etc.)
• Deep knowledge of wireless communication protocols and standards (Wi-Fi 802.11, Bluetooth)
• Expert proficiency in MATLAB/Simulink and C/C++ for algorithm modeling and simulation
• Knowledgeable proficiency in Verilog, VHDL, or SystemVerilog for RTL design
• Extensive experience with FPGA development tools (Xilinx Vivado, Intel Quartus) and/or ASIC design flows
• Experience with RTL verification methodologies including simulation, formal verification, and UVM

Desired Qualifications:

• Experience with digital predistortion (DPD), crest-factor reduction, or PA linearization techniques
• Knowledge of HW/SW co-design, firmware integration, and modem L1/L2 development
• Experience with high-level synthesis (HLS) tools
• Experience with power optimization techniques for embedded systems
• Track record of patents or publications in signal processing or wireless communications
• Experience running synthesis, place-and-route, and timing closure activities using industry-standard EDA tools

Career Growth Philosophy:

At Semtech, we believe that innovation starts with people. We are committed to empowering professional development through access to mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment.

Our pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities.

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.