Attached to the Technical Platform in the Faculty of Engineering (STI), you will join the EDA team of EPFL. You will contribute to and maintain a database of analog, digital or mixed IP blocks for EPFL tape outs (e.g. FLL, ADCs, power management units, standard cells), provide technical support to designers on their tape outs, setup design flows with the latest EDA tools and advanced technology nodes, and generally solve complex technical problems that push the limits of what can be done with traditional design methodologies.

• Organize and populate a repository of shared analog, digital and mixed design IPs for EPFL laboratories and participants to the Swisschips initiative.
• Setup, support and document design flows from the main EDA vendors (Synopsys/Cadence/Siemens) tools for state of the art industrial CMOS technologies (FinFET, SOI).
• Contribute to the EDA infrastructure of EPFL by evaluating computing platforms and supporting their deployment. Act as a bridge with IT support
• Provide support for EDA related issues with expert knowledge from design to chip finishing to multiple teams in different laboratories.
• Interact with students and researchers to help them with their IC design related research topics.

• Organize and populate a repository of shared analog, digital and mixed design IPs for EPFL laboratories and participants to the Swisschips initiative.
• Setup, support and document design flows from the main EDA vendors (Synopsys/Cadence/Siemens) tools for state of the art industrial CMOS technologies (FinFET, SOI).
• Contribute to the EDA infrastructure of EPFL by evaluating computing platforms and supporting their deployment. Act as a bridge with IT support.
• Provide support for EDA related issues with expert knowledge from design to chip finishing to multiple teams in different laboratories.
• Interact with students and researchers to help them with their IC design related research topics.
• Education and strong background on VLSI and IC design (FPGA design would be a plus).
• Master or PhD in IC design and experience with tape-outs and sign-off procedures (Design and tapeout experience with FinFET or FDSOI is a plus).
• Excellent knowledge of UNIX, scripting languages, HDL, and working experience with IC design tools from major EDA vendors is mandatory.
• A good command of written and spoken English as well as interpersonal communication skills are necessary for technical interaction in a multi-cultural environment like EPFL.
• Customer-focused, with strong organizational and planning skills

• A very dynamic and exciting working environment, including a lot of options to interact with research laboratories and the latest design tool and technologies.
• A multi-cultural working environment and a strong academic quality

Activity Rate Min : 100,00

Contract Type: CDD

Duration: 1 year renewable

Reference: 849

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